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| MOTOROLA SEMICONDUCTOR TECHNICAL DATA Document order number: MC33886/D Rev 4.0, 10/2003 33886 5.0 A H-Bridge The 33886 is a monolithic H-Bridge ideal for fractional horsepower DC-motor and bi-directional thrust solenoid control. The IC incorporates internal control logic, charge pump, gate drive, and low RDS(ON) MOSFET output circuitry. The 33886 is able to control continuous inductive DC load currents up to 5.0 A. Output loads can be pulse width modulated (PWM-ed) at frequencies up to 10 kHz. A Fault Status output reports undervoltage, short circuit, and overtemperature conditions. Two independent inputs control the two halfbridge totem-pole outputs. Two disable inputs force the H-Bridge outputs to tri-state (exhibit high impedance). The 33886 is parametrically specified over a temperature range of -40C TA 125C, 5.0 V V+ 28 V. The IC can also be operated up to 40 V with derating of the specifications. The IC is available in a surface mount power package with exposed pad for heatsinking. Features * Similar to the MC33186DH1 with Enhanced Features * 5.0 V to 40 V Continuous Operation * 120 m RDS(ON) H-Bridge MOSFETs * TTL /CMOS Compatible Inputs * PWM Frequencies up to 10 kHz * Active Current Limiting via Internal Constant OFF-Time PWM (with Temperature-Dependent Threshold Reduction) * Output Short Circuit Protection * Undervoltage Shutdown * Fault Status Reporting 5.0 A H-BRIDGE DH SUFFIX 20-TERMINAL HSOP CASE 979C ORDERING INFORMATION Device MC33886DH/R2 Temperature Range (TA) -40C to 125C Package 20 HSOP Simplified Application Diagram 33886 Simplified Application Diagram V+ 5.0 V 33886 CCP V+ OUT1 Motor OUT2 PGND AGND IN OUT MCU OUT OUT OUT FS IN1 IN2 D1 D2 (c) Motorola, Inc. 2003 CCP C CP Charge Pump VPWR V+ (each) 80 uA 80 A 5.0 V Regulator Regulator Current Limit, Current Limit, Overcurrent Short Circuit Sense Sense Circuit Circuit OUT1 Gate Drive OUT2 OverOvertemperature temperature IN1 IN2 D1 D2 25 A 25 uA Control Logic FS Undervoltage AGND PGND Figure 1. 33886 Simplified Internal Block Diagram 33886 2 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA AGND FS IN1 V+ V+ OUT1 OUT1 DNC PGND PGND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 DNC IN2 D1 CCP V+ OUT2 OUT2 D2 PGND PGND TERMINAL FUNCTION DESCRIPTION Terminal 1 2 3 4, 5, 16 6, 7 8, 20 9-12 13 14, 15 17 18 19 Terminal Name AGND FS IN1 Formal Name Analog Ground Fault Status for H-Bridge Logic Input Control 1 Positive Power Supply H-Bridge Output 1 Do Not Connect Power Ground Disable 2 H-Bridge Output 2 Charge Pump Capacitor Disable 1 Logic Input Control 2 Low-current analog signal ground. Open drain active LOW Fault Status output requiring a pull-up resistor to 5.0 V. True logic input control of OUT1 (i.e., IN1 logic HIGH = OUT1 HIGH). Positive supply connections. Output 1 of H-Bridge. Either do not connect (leave floating) or connect these terminals to ground in the application. They are test mode terminals used in manufacturing only. Device high-current power ground. Active LOW input used to simultaneously tri-state disable both H-Bridge outputs. When D2 is Logic LOW, both outputs are tri-stated. Output 2 of H-Bridge. External reservoir capacitor connection for internal charge pump capacitor. Active HIGH input used to simultaneously tri-state disable both H-Bridge outputs. When D1 is Logic HIGH, both outputs are tri-stated. True logic input control of OUT2 (i.e., IN2 logic HIGH = OUT2 HIGH). Definition V+ OUT1 DNC PGND D2 OUT2 CCP D1 IN2 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33886 3 MAXIMUM RATINGS All voltages are with respect to ground unless otherwise noted. Rating Supply Voltage Input Voltage (Note 1) FS Status Output (Note 2) Continuous Current (Note 3) ESD Voltage Human Body Model (Note 4) Machine Model (Note 5) Storage Temperature Ambient Operating Temperature (Note 7) Operating Junction Temperature Terminal Soldering Temperature (Note 8) Approximate Junction-to-Board Thermal Resistance (and Package Dissipation) (Note 9) HSOP (6.0 W) Notes 1. 2. 3. 4. 5. 6. 7. 8. 9. RJB ~5.0 VESD1 VESD2 TSTG TA TJ TSOLDER 2000 (Note 6) 200 -65 to 150 -40 to 125 -40 to 150 220 C C C C C/W Symbol V+ VIN V FS IOUT Value 40 -0.1 to 7.0 7.0 5.0 Unit V V V A V Exceeding the input voltage on IN1, IN2, D1, or D2 may cause a malfunction or permanent damage to the device. Exceeding the pull-up resistor voltage on the open drain FS terminal may cause permanent damage to the device. Continuous current capability so long as junction temperature is 150C. ESD1 testing is performed in accordance with the Human Body Model (CZAP = 100 pF, RZAP = 1500 ). ESD2 testing is performed in accordance with the Machine Model (CZAP = 200 pF, RZAP = 0 ). All terminals are capable of Human Body Model ESD voltages of 2000 V with two exceptions: (1) D2 to PGND is capable of 1500 V and (2) OUT1 to AGND is capable of 1000 V. The limiting factor is junction temperature, taking into account the power dissipation, thermal resistance, and heat sinking. Terminal soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. Exposed heat sink pad plus the power and ground terminals comprise the main heat conduction paths. The actual RJB (junction-to-PC board) values will vary depending on solder thickness and composition and copper trace.A 33886 4 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA STATIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions 5.0 V V+ 28 V and -40C TA 125C unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25C under nominal conditions unless otherwise noted. Characteristic Symbol Min Typ Max Unit POWER SUPPLY Operating Voltage Range (Note 10) Standby Supply Current VEN = 5.0 V, IOUT = 0 A Threshold Supply Voltage Switch-OFF Switch-ON Hysteresis V+(thres-OFF) V+(thres-ON) V+(hys) 4.15 4.5 150 4.4 4.75 - 4.65 5.0 - V V mV V+ IQ(standby) - - 20 5.0 - 40 V mA CHARGE PUMP Charge Pump Voltage V+ = 5.0 V 8.0 V V+ 40 V VCP - V+ 3.35 - - - - 20 V CONTROL INPUTS Input Voltage (IN1, IN2, D1, D2) Threshold HIGH Threshold LOW Hysteresis Input Current (IN1, IN2, D1) (Note 11) VIN = 0 V D2 Input Current (Note 12) V D2 = 5.0 V I D2 - 25 100 VIH VIL VHYS IIN -200 -80 - A 3.5 - 0.7 - - 1.0 - 1.4 - A V Notes 10. Specifications are characterized over the range of 5.0 V V+ 28 V. Operation >28 V will cause some parameters to exceed listed min/max values. Refer to typical operating curves to extrapolate values for operation >28 V but 40 V. 11. Inputs IN1, IN2, and D1 have independent internal pull-up current sources. 12. The D2 input incorporates an active internal pull-down current sink. MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33886 5 STATIC ELECTRICAL CHARACTERISTICS (continued) Characteristics noted under conditions 5.0 V V+ 28 V and -40C TA 125C unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25C under nominal conditions unless otherwise noted. Characteristic Symbol Min Typ Max Unit POWER OUTPUTS (OUT1, OUT2) Output-ON Resistance (Note 13) 5.0 V V+ 28 V, TJ = 25C 8.0 V V+ 28 V, TJ = 150C 5.0 V V+ 8.0 V, TJ = 150C Active Current Limiting Threshold (via Internal Constant OFF-Time PWM) (Note 14) High-Side Short Circuit Detection Threshold Low-Side Short Circuit Detection Threshold Leakage Current (Note 15) VOUT = V+ VOUT = GND Output FET Body Diode Forward Voltage Drop (Note 16) IOUT = 3.0 A Switch-OFF Thermal Shutdown Hysteresis TLIM THYS 175 - - 15 - - VF - - 2.0 C ILIM ISCH ISCL IOUT(leak) - - 100 30 200 60 V RDS(ON) - - - 120 - - - 225 300 A 5.2 11 8.0 6.5 - - 7.8 - - A A A m FAULT STATUS (Note 17) Fault Status Leakage Current (Note 18) V FS = 5.0 V Fault Status SET Voltage (Note 19) I FS = 300 A V FS(LOW) - - 1.0 I FS(leak) - - 10 V A Notes 13. Output-ON resistance as measured from output to V+ and ground. 14. Product with date codes of December 2002, week 51, will exhibit the values indicated in this table. Product with earlier date codes may exhibit a minimum of 6.0 A and a maximum of 8.5 A. 15. Outputs switched OFF with D1 or D2. 16. Parameter is guaranteed by design but not production tested. 17. Fault Status output is an open drain output requiring a pull-up resistor to 5.0 V. 18. Fault Status Leakage Current is measured with Fault Status HIGH and not SET. 19. Fault Status Set Voltage is measured with Fault Status LOW and SET with I FS = 300 A. 33886 6 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA DYNAMIC ELECTRICAL CHARACTERISTICS Characteristics noted under conditions 5.0 V V+ 28 V and -40C TA 125C unless otherwise noted. Typical values noted reflect the approximate parameter mean at TA = 25C under nominal conditions unless otherwise noted. Characteristic Symbol Min Typ Max Unit TIMING CHARACTERISTICS PWM Frequency (Note 20) Maximum Switching Frequency During Active Current Limiting (Note 21) Output ON Delay (Note 22) V+ = 14 V Output OFF Delay (Note 22) V+ = 14 V Output Rise and Fall Time (Note 23) V+ = 14 V, IOUT = 3.0 A Output Latch-OFF Time Output Blanking Time Output FET Body Diode Reverse Recovery Time (Note 24) Disable Delay Time (Note 25) Short Circuit/Overtemperature Turn-OFF Time (Note 26) Power-OFF Delay Time f PWM f MAX t d(ON) - - - - 10 20 kHz kHz s - - 18 s t d(OFF) - - 18 tf , t r 2.0 5.0 20.5 16.5 - - 4.0 1.0 8.0 26 21 - 8.0 - 5.0 s ta tb t rr 15 12 100 - - - s s ns s s ms t d(disable) t FAULT t pod Notes 20. The outputs can be PWM controlled from an external source. This is typically done by holding one input high while applying a PWM pulse train to the other input. The maximum PWM frequency obtainable is a compromise between switching losses and switching frequency. Refer to Typical Switching Waveforms, Figures 11 through 18, pp. 12-13. 21. The Maximum Switching Frequency during active current limiting is internally implemented. The internal control produces a constant OFFtime PWM of the output. The output load current effects the Maximum Switching Frequency. 22. Output Delay is the time duration from the midpoint of the IN1 or IN2 input signal to the 10% or 90% point (dependent on the transition direction) of the OUT1 or OUT2 signal. If the output is transitioning HIGH-to-LOW, the delay is from the midpoint of the input signal to the 90% point of the output response signal. If the output is transitioning LOW-to-HIGH, the delay is from the midpoint of the input signal to the 10% point of the output response signal. See Figure 2, page 8. 23. Rise Time is from the 10% to the 90% level and Fall Time is from the 90% to the 10% level of the output signal. See Figure 4, page 8. 24. Parameter is guaranteed by design but not production tested. 25. Disable Delay Time is the time duration from the midpoint of the D (disable) input signal to 10% of the output tri-state response. See Figure 3, page 8. 26. Increasing currents will become limited at ILIM. Hard shorts will breach the ISCH or ISCL limit, forcing the output into an immediate tri-state latch-OFF. See Figures 6 and 7, page 9. Active current limiting will cause junction temperatures to rise. A junction temperature above 160C will cause the active current limiting to progressively "fold back" (or decrease) to 2.5 A typical at 175C where thermal latch-OFF will occur. See Figure 5, page 8. MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33886 7 Timing Diagrams VIN1, IN2 (V) 5.0 50% 0 td(ON) 90% 50% td(OFF) VOUT1, 2 (V) VPWR 0 10% TIME Figure 2. Output Delay Time 5.0 V 0V 0 Figure 3. Disable Delay Time VOUT1, 2 (V) V PWR 90% tf tr 90% 10% 10% 0 Figure 4. Output Switching Time IILIM, IOUTPUT CURRENT (A) MAX LIM, CURRENT (A) 6.5 6.6 2.5 Thermal Shutdown 160 175 T J, JUNCTION TEMPERATURE (o C) Figure 5. Active Current Limiting Versus Temperature (Typical) 33886 8 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA Recovery Spikes Load Capacitance and/or Diode Reverse Recovery Spikes Diode Reverse IOUT IILOAD, OUTPUT CURRENT (A) OUT , , CURRENT (A) 8.0 6.5 PWM Active Current Current Limiting Limiting (See Figure 7) (See (See Figure6) 7) 0 or IN2 IN1 OR IN2 IN2 or IN1 IN1OR IN2 ISCL Short Circuit Detect Threshold Typ. Short Ckt. Detect Threshold for Low-Side FETs Typical Current Threshold Typ. Current Limit Limiting Threshold Hard Short Detect and Latch-OFF Hard Short Detect and Latch-Off INn, LOGIC IN [1] [0] IN1 IN2 IN1 IN2 IN2 or IN1 IN2 OR IN1 or IN2 IN2ORIN1 D1, LOGIC IN D2, LOGIC IN FS, LOGIC OUT SF [1] [0] [1] [0] [1] Outputs Outputs Tristated Tri-stated [0] TIME Outputs Operational Outputs Operational (per Input Control Condition) (per Input Control Condition) Outputs Tristated Tri-stated Figure 6. Active Current Limiting Versus Time ILOAD, OUTPUT CURRENT (A) IOUT, CURRENT (A) 8.0 ta 6.5 tb IShort Circuit Detect Threshold Overcurrent Minimum Threshold SCL Short Circuit Detect Threshold ta = Tristate Latch-OFF Time a = Output Output OFF Time ttb = Current Blanking Time b = Output Limit Blank Time Typical Current Typical PWM Load Limiting Waveform Current Limiting Waveform Hard Output Hard Short Detect Short Latch-OFF Latch-Off Prevented During tb TIME Figure 7. Active Current Limiting Detail MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33886 9 Electrical Performance Curves 0.40 0.35 0.30 0.25 Ohms 0.20 0.15 0.10 0.05 0.0 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 Volts Figure 8. Typical High-Side RDS(ON) Versus V+ 0.13 0.128 0.126 Ohms OHMS 0.124 0.122 0.12 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 Volts VPWR Figure 9. Typical Low-Side RDS(ON) Versus V+ 33886 10 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 9.0 8.0 7.0 6.0 5.0 OHMS milliamperes 4.0 3.0 2.0 1.0 0.0 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 Volts VPWR Figure 10. Typical Quiescent Supply Current Versus V+ MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33886 11 Typical Switching Waveforms Important For all plots, the following applies: * Ch2=2.0 A per division * LLOAD =533 H @ 1.0 kHz * LLOAD =530 H @ 10.0 kHz * RLOAD =4.0 Output Voltage (OUT1) Output Voltage (OUT1) IOUT IOUT Input Voltage (IN1) V+=24 V fPWM =1.0 kHz Duty Cycle=10% Input Voltage (IN1) V+=34 V fPWM =1.0 kHz Duty Cycle=90% Figure 11. Output Voltage and Current vs. Input Voltage at V+ = 24 V, PMW Frequency of 1.0 kHz, and Duty Cycle of 10% Figure 13. Output Voltage and Current vs. Input Voltage at V+ = 34 V, PMW Frequency of 1.0 kHz, and Duty Cycle of 90%, Showing Device in Current Limiting Mode Output Voltage (OUT1) Output Voltage (OUT1) IOUT IOUT Input Voltage (IN1) V+=24 V fPWM =1.0 kHz Duty Cycle=50% Input Voltage (IN1) V+=22 V fPWM =1.0 kHz Duty Cycle=90% Figure 12. Output Voltage and Current vs. Input Voltage at V+ = 24 V, PMW Frequency of 1.0 kHz, and Duty Cycle of 50% Figure 14. Output Voltage and Current vs. Input Voltage at V+ = 22 V, PMW Frequency of 1.0 kHz, and Duty Cycle of 90% 33886 12 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA Output Voltage (OUT1) Output Voltage (OUT1) IOUT IOUT Input Voltage (IN1) V+=24 V fPWM =10 kHz Duty Cycle=50% Input Voltage (IN1) V+=12 V fPWM =20 kHz Duty Cycle=50% Figure 15. Output Voltage and Current vs. Input Voltage at V+ = 24 V, PMW Frequency of 10 kHz, and Duty Cycle of 50% Figure 17. Output Voltage and Current vs. Input Voltage at V+ = 12 V, PMW Frequency of 20 kHz, and Duty Cycle of 50% for a Purely Resistive Load Output Voltage (OUT1) Output Voltage (OUT1) IOUT IOUT Input Voltage (IN1) V+=24 V fPWM =10 kHz Duty Cycle=90% Input Voltage (IN1) V+=12 V fPWM =20 kHz Duty Cycle=90% Figure 16. Output Voltage and Current vs. Input Voltage at V+ = 24 V, PMW Frequency of 10 kHz, and Duty Cycle of 90% Figure 18. Output Voltage and Current vs. Input Voltage at V+ = 12 V, PMW Frequency of 20 kHz, and Duty Cycle of 90% for a Purely Resistive Load MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33886 13 Table 1. Truth Table The tri-state conditions and the fault status are reset using D1 or D2. The truth table uses the following notations: L = LOW, H = HIGH, X = HIGH or LOW, and Z = High impedance (all output power transistors are switched off). Input Conditions Fault Status Flag Output States Device State D1 Forward Reverse Output FET Body Diode Low Output FET Body Diode High Disable 1 (D1) Disable 2 (D2) IN1 Disconnected IN2 Disconnected D1 Disconnected D2 Disconnected Undervoltage (Note 27) Overtemperature (Note 28) Short Circuit (Note 28) L L L L H X L L Z X X X X D2 IN1 H L L H X X Z X X X X X X IN2 L H L H X X X Z X X X X X FS H H H H L L H H L L L L L OUT1 H L L H Z Z H X Z Z Z Z Z OUT2 L H L H Z Z X H Z Z Z Z Z H H H H X L H H X Z X X X Notes 27. In the case of an undervoltage condition, the outputs tri-state and the fault status is SET logic LOW. Upon undervoltage recovery, fault status is reset automatically or automatically cleared and the outputs are restored to their original operating condition. 28. When a short circuit or overtemperature condition is detected, the power outputs are tri-state latched-OFF independent of the input signals and the fault status flag is SET logic LOW. 33886 14 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA SYSTEM/APPLICATION INFORMATION INTRODUCTION Numerous protection and operational features (speed, torque, direction, dynamic braking, and PWM control), in addition to the 5.0 A current capability, make the 33886 a very attractive, cost-effective solution for controlling a broad range of fractional horsepower DC motors. A pair of 33886 devices can be used to control bipolar stepper motors in both directions. In addition, the 33886 can be used to control permanent magnet solenoids in a push-pull variable force fashion using PWM control. The 33886 can also be used to excite transformer primary windings with a switched square wave to produce secondary winding AC currents. As shown in Figure 1, Simplified Internal Block Diagram, page 2, the 33886 is a fully protected monolithic H-Bridge with Fault Status reporting. For a DC motor to run the input conditions need be as follows: D1 input logic LOW, D2 input logic HIGH, FS flag cleared (logic HIGH), with one IN logic LOW and the other IN logic HIGH to define output polarity. The 33886 can execute dynamic braking by simultaneously turning on either both high-side MOSFETs or both low-side MOSFETs in the output H-Bridge; e.g., IN1 and IN2 logic HIGH or IN1 and IN2 logic LOW. The 33886 outputs are capable of providing a continuous DC load current of 5.0 A from a 40 V V+ source. An internal charge pump supports PWM frequencies up to 10 kHz. An external pull-up resistor is required for the open drain FS terminal for fault status reporting. Two independent inputs (IN1 and IN2) provide control of the two totem-pole half-bridge outputs. Two disable inputs (D1 and D2) are for forcing the H-Bridge outputs to a high impedance state (all H-Bridge switches OFF). The 33886 has undervoltage shutdown with automatic recovery, active current limiting, output short-circuit latch-OFF, and overtemperature latch-OFF. An undervoltage shutdown, output short circuit latch-OFF, or overtemperature latch-OFF fault condition will cause the outputs to turn OFF (i.e., become high impedance or tri-stated) and the fault output flag to be set LOW. Either of the Disable inputs or V+ must be "toggled" to clear the fault flag. The short circuit/overtemperature shutdown scheme is unique and best described as using a junction temperaturedependent active current "fold back" protection scheme. When a short circuit condition is experienced, the current limited output is "ramped down" as the junction temperature increases above 160C, until at 175C the current has decreased to about 2.5 A. Above 175C, overtemperature shutdown (latch-OFF) occurs. This feature allows the device to remain in operation for a longer time with unexpected loads, while still retaining adequate protection for both the device and the load. FUNCTIONAL TERMINAL DESCRIPTION PGND and AGND Power and analog ground terminals. The power and analog ground terminals should be connected together with a very low impedance connection. Fault Status (FS) This terminal is the device fault status output. This output is an active LOW open drain structure requiring a pull-up resistor to 5.0 V. Refer to Table 1, Truth Table, page 14. V+ V+ terminals are the power supply inputs to the device. All V+ terminals must be connected together on the printed circuit board with as short as possible traces offering as low impedance as possible between terminals. V+ terminals have an undervoltage threshold. If the supply voltage drops below a V+ undervoltage threshold, the output power stage switches to a tri-state condition and the fault status flag is SET and the Fault Status terminal voltage switched to a logic LOW. When the supply voltage returns to a level that is above the threshold, the power stage automatically resumes normal operation according to the established condition of the input terminals and the fault status flag is automatically reset logic HIGH. IN1, IN2, D1, and D2 These terminals are input control terminals used to control the outputs. These terminals are 5.0 V CMOS-compatible inputs with hysteresis. The IN1 and IN2 independently control OUT1 and OUT2, respectively. D1 and D2 are complimentary inputs used to tri-state disable the H-Bridge outputs. When either D1 or D2 is SET (D1 = logic HIGH or D2 = logic LOW) in the disable state, outputs OUT1 and OUT2 are both tristate disabled; however, the rest of the device circuitry is fully operational and the supply IQ(standby) current is reduced to a few milliamperes. Refer to Table 1, Truth Table, and STATIC ELECTRICAL CHARACTERISTICS table, page 5. MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33886 15 OUT1 and OUT2 These terminals are the outputs of the H-Bridge with integrated output FET body diodes. The bridge output is controlled using the IN1, IN2, D1, and D2 inputs. The outputs have active current limiting above 6.5 A. The outputs also have thermal shutdown (tri-state latch-OFF) with hysteresis as well as short circuit latch-OFF protection. A disable timer (time t b) incorporated to detect currents that are higher than active current limit is activated at each output activation to facilitate detecting hard output short conditions (see Figure 7, page 9). CCP Charge pump output terminal. A filter capacitor (up to 33 nF) can be connected from the CCP terminal and PGND. The device can operate without the external capacitor, although the CCP capacitor helps to reduce noise and allows the device to perform at maximum speed, timing, and PWM frequency. PERFORMANCE FEATURES Short Circuit Protection If an output short circuit condition is detected, the power outputs tri-state (latch-OFF) independent of the input (IN1 and IN2) states, and the fault status output flag is SET logic LOW. If the D1 input changes from logic HIGH to logic LOW, or if the D2 input changes from logic LOW to logic HIGH, the output bridge will become operational again and the fault status flag will be reset (cleared) to a logic HIGH state. The output stage will always switch into the mode defined by the input terminals (IN1, IN2, D1, and D2), provided the device junction temperature is within the specified operating temperature. Overtemperature Shutdown and Hysteresis If an overtemperature condition occurs, the power outputs are tri-state (latched-OFF) independent of the input signals and the fault status flag is SET logic LOW. To reset from this condition, D1 must change from logic HIGH to logic LOW, or D2 must change from logic LOW to logic HIGH. When reset, the output stage switches ON again, provided that the junction temperature is now below the overtemperature threshold limit minus the hysteresis. Note Resetting from the fault condition will clear the fault status flag. Active Current Limiting The maximum current flow under normal operating conditions is internally limited to ILIM (5.2 A to 7.8 A). When the maximum current value is reached, the output stages are tristated for a fixed time (t a) of 20 s typical. Depending on the time constant associated with the load characteristics, the current decreases during the tri-state duration until the next output ON cycle occurs (see Figures 7 and 13, page 9 and page 12, respectively). The current limiting threshold value is dependent upon the device junction temperature. When -40C < TJ < 160C, ILIM is between 5.2 A and 7.8 A. When TJ exceeds 160C, the ILIM current decreases linearly down to 2.5 A typical at 175C. Above 175C the device overtemperature circuit detects TLIM and overtemperature shutdown occurs (see Figure 5, page 8). This feature allows the device to remain operational for a longer time but at a regressing output performance level at junction temperatures above 160C. Main Differences Compared to MC33186DH1 * COD terminal has been removed. Terminal 8 is now a Do Not Connect (DNC) terminal. * Terminal 20 is no longer connected in the 20 HSOP package. It is now a DNC terminal. * RDS(ON) max at TJ = 150C is now 225 m per each output transistor. * Maximum temperature operation is now 160C, as minimum thermal shutdown temperature has increased. * Current regulation limiting foldback is implemented above 160C TJ. * Thermal resistance junction to case has been increased from ~2.0C/W to ~5.0C/W. 33886 16 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA PACKAGE INFORMATION The 33886 is designed for enhanced thermal performance. The significant feature of this device is the exposed copper pad on which the power die is soldered. This pad is soldered on a PCB to provide heat flow to ambient and also to provide thermal capacitance. The more copper area on the PCB, the better the power dissipation and transient behavior will be. Example Characterization on a double-sided PCB: bottom side area of copper is 7.8 cm2; top surface is 2.7 cm2 (see Figure 19); grid array of 24 vias 0.3 mm in diameter. Figure 20 shows the thermal response with the device soldered on to the test PCB described in Figure 19. 100 10 Rth (C/W) 1 0,1 0,001 0,01 0,1 1 10 t, Time (s) 100 1000 10000 Figure 20. 33886 Thermal Response Top Side Bottom Side Figure 19. PCB Test Layout MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33886 17 APPLICATIONS A typical application schematic is shown in Figure 21. For precision high-current applications in harsh, noisy environments, the V+ by-pass capacitor may need to be substantially larger. DC MOTOR V+ 33886 AGND V+ CCP 33 nF + 47 F OUT1 OUT2 D2 D1 FS PGND IN1 IN2 IN2 IN1 FS D1 D2 Figure 21. 33886 Typical Application Schematic 33886 18 MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA PACKAGE DIMENSIONS DH SUFFIX 20-TERMINAL HSOP PLASTIC PACKAGE CASE 979C-02 ISSUE A PIN ONE ID NOTES: 1. CONTROLLING DIMENSION: MILLIMETER. 2. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DATUM PLANE -H- IS LOCATED AT BOTTOM OF LEAD AND IS COINCIDENT WITH THE LEAD WHERE THE LEAD EXITS THE PLASTIC BODY AT THE BOTTOM OF THE PARTING LINE. 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD PROTRUSION. ALLOWABLE PROTRUSION IS 0.150 PER SIDE. DIMENSIONS D AND E1 DO INCLUDE MOLD MISMATCH AND ARE DETERMINED AT DATUM PLANE -H-. 5. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 TOTAL IN EXCESS OF THE b DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. DATUMS -A- AND -B- TO BE DETERMINED AT DATUM PLANE -H-. 7. DIMENSION D DOES NOT INCLUDE TIEBAR PROTRUSIONS. ALLOWABLE TIEBAR PROTRUSIONS ARE 0.150 PER SIDE. h X 45 E2 1 20 E3 D2 18X e D e/2 D1 10 11 EXPOSED HEATSINK AREA B E1 10X E A E4 BOTTOM VIEW MILLIMETERS DIM MIN MAX A 3.000 3.400 A1 0.100 0.300 A2 2.900 3.100 A3 0.00 0.100 D 15.800 16.000 D1 11.700 12.600 D2 0.900 1.100 E 13.950 14.450 E1 10.900 11.100 E2 2.500 2.700 E3 6.400 7.200 E4 2.700 2.900 L 0.840 1.100 L1 0.350 BSC b 0.400 0.520 b1 0.400 0.482 c 0.230 0.320 c1 0.230 0.280 e 1.270 BSC h --- 1.100 q 0 8 aaa 0.200 bbb 0.100 bbb Y A A2 M CB H DATUM PLANE b1 c c1 b C SEATING PLANE aaa GAUGE PLANE M CA SECTION W-W L1 W L W A1 A3 bbb C q (1.600) DETAIL Y MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA 33886 19 Information in this document is provided solely to enable system and software implementers to use Motorola products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. MOTOROLA and the Stylized M Logo are registered in the US Patent and Trademark Office. All other product or service names are the property of their respective owners. (c) Motorola, Inc. 2003 HOW TO REACH US: USA/EUROPE/LOCATIONS NOT LISTED: Motorola Literature Distribution P.O. Box 5405, Denver, Colorado 80217 1-800-521-6274 or 480-768-2130 JAPAN: Motorola Japan Ltd.; SPS, Technical Information Center 3-20-1 Minami-Azabu. Minato-ku, Tokyo 106-8573, Japan 81-3-3440-3569 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; Silicon Harbour Centre 2 Dai King Street, Tai Po Industrial Estate, Tai Po, N.T., Hong Kong 852-26668334 HOME PAGE: http://motorola.com/semiconductors MC33886/D |
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